In the field of satellite communications, the packaging of electronic circuits and sub-systems, within the satellite payload, presents some significant survival challenges due to the extreme conditions experienced in operation. For example, the packaging must provide both mechanical and electrical isolation from the inside to outside of the package in order to prevent unwanted signal radiation and, by reciprocity, provide protection of the electronics from external signals that may cause interference to the equipment operation. The packaging must also be able to tolerate rapid de-pressurisation and harsh vibration environment experienced during the ascent of an artificial Satellite during its launch phase, particularly at lift-off. The packaging is subjected to the extreme variations in temperature that are experienced in space, particularly when the satellite passes into Solar eclipse during its orbit and must be able to tolerate the twice-daily thermal shock experienced by the Satellite crossing the Solar/Geo terminator during its operational lifetime. This equates to approximately 11,000 cycles for a typical 15-year geostationary mission and up to 60,000 cycles for Satellites operating in polar or highly elliptical orbits.
Electronic modules, including those used within Satellite payloads, often make extensive use of low electrical loss ceramic materials as substrates, to provide a base on which RF components are mounted and interconnected with conducting tracks. One or more tracks may be formed on one or more layers throughout the thickness of the substrate using manufacturing techniques such as High Temperature Co-fired Ceramic (HTCC) and Low Temperature Co-fired Ceramic (LTCC). These multi-layer ceramic substrates are, of necessity, further integrated into machined, or otherwise manufactured, metal housings so as to form self-contained, electrically screened, electronic modules. The use of metal housings does not exclude other means of manufacture, which are not implicitly constructed of solid base metals but make use of non-conducting materials with suitable exterior metalisations so as to provide the desired electrical screening.
On selecting an appropriate ceramic material for use as a substrate, many properties and features are desirable. For example, the material should exhibit good mechanical temperature stability coupled with a low coefficient of linear expansion and good electrical property stability with variation in temperature. Moreover, the relative ease with which track metallisations can be deposited onto the materials surface, including a buried layer capability, the adhesion of the metallised tracking to the surface of the substrate and the relative ease with which connections can be made to the metallised tracking are considerations. The substrate material should also be able to withstand the high temperatures seen during component attachment operations, have good mechanical handling properties and good electrical and mechanical repeatability.
Whilst typical ceramic materials are well suited to providing a stable substrate suitable for RF circuitry, the usage of such a material often presents significant difficulties when integrating the substrates into a metal housing. The method of fixing the ceramic substrate within the metal housing is key to a physically robust and electrically sound design. A number of methods have been used to fix the circuit substrate to its housing.
For example, it is commonplace to fix a ceramic substrate to its metallic housing using electrically conductive adhesives so as to provide the required RF performance in terms of electrical isolation. Many electrically conductive adhesives are composed of traditional non-conductive thermosetting adhesives, like multi-part epoxy resins, for example, that are mixed with a critical proportion of finite sized, solid metal, conductive particulate. Under normal conditions the mixture performs poorly as an electrical conductor because only a small percentage of the metallic particulate is in continuous physical contact. With the application of mechanical pressure, and due to the relatively low viscosity of the uncured resin, a larger proportion of the metallic particulate can come into intimate physical contact thus increasing the electrical conductivity. Additionally, by elevating the temperature, under the stated condition of increased pressure, the viscosity of the resin mixture is further reduced allowing still more metallic particulate to come into contact and, at the same time, accelerating the desired catalytic reaction to cure the resin. Ultimately, the cured resin is set in a position that prevents the bulk of the contacting solid metal conductive particulate from separating once the applied mechanical pressure is removed.
An example of the use of a conductive adhesive can be seen in FIG. 1, which shows a typical module that contains a ceramic substrate 2 mounted into a machined metal housing 1. A plurality of conductive tracks 6,7 are formed on the surface of substrate 2 which may contain a plurality of circuit layers that can be electrically interconnected to its top and bottom layers, as shown, using known via-hole technology. The ceramic substrate 2 is held in place with a conductive adhesive 3 in contact with the top and bottom conductive layers simultaneously. Above the ceramic substrate is a clamping lid, or frame, 4 which is in electrical contact with an outer ring track of the substrate, as well as providing an internal contacting wall 5. In FIG. 1, wall 5 is disposed centrally, for example only, but it should be understood that there maybe many such internal walls depending on the required substrate circuit complexity. The function of the wall 5 is to provide electrical isolation from RF track 6 to an adjacent RF track 7. Additionally, the floor of the housing 1 may be provided with apertures allowing for conductive tracks, similar to tracks 6 and 7, on the bottom layer of the substrate 2, together with electronic components 8 mounted thereto. To maintain RF integrity and ultimate electrical isolation, the housing 1 is also provided with a bottom lid 9. Fixing of the top and bottom lids 4, 9 may be achieved using conductive adhesives, soldering or beam welding schemes.
In the above arrangement, it is critical that the substrate fixing adhesive make good electrical contact with the clamping lid 4, and the housing floor at the outer ring track as well as the internal walls 5, or webs, simultaneously.
A significant problem with such adhesive substrate fixing techniques is the planar surface uniformity or “flatness” of the two surfaces to be bonded. If either of the two surfaces are not precisely parallel and uniform, some areas will bear the majority of the applied mechanical load during the pressure application stage of the manufacturing process, prior to the adhesive curing cycle, while other areas will bear a somewhat smaller mechanical load. On completion of the curing process, the conductivity achieved will be high in areas of high pressure and low in areas of low pressure. This situation leads to uncontrolled electrical isolation across the top and bottom regions of the substrate housing which may effect the circuit performance and ultimately may lead to failure of the package functionality.
In addition, when the surface of the substrate is not precisely uniform as compared to its housing, the risk of cracking of the substrate increases during the pressure application stage of the manufacturing process. The electrical effects of such a crack are not always apparent at initial electrical testing and so there is a risk that, in a launched Satellite for example, the crack may further propagate into or across the substrate during mission life and lead to the failure of equipment.
The use of “as fired” ceramics for circuit realisation is limited by the degree of shrinkage and uniformity of the surface achieved during the materials sintering process. In general, surface planarisation of the substrate is necessary prior to RF component fabrication due to large surface roughness of fired ceramic parts. The surface roughness is determined both by the intrinsic roughness of dielectric sheets and more typically by buried features underneath the surface. In the past, arbitrary size limitations for ceramic circuits using conductive adhesive fixing have been imposed. For this arbitrary choice of size, improved surface uniformity can be achieved by lapping and surface polishing but this technique becomes uneconomic to implement for larger substrates. For example, surface grinding of both the top and bottom planes of a 100 mm 2 substrate so as to achieve parallel surfaces with the required surface uniformity may take several days. Moreover, ceramic polishing of large surfaces can lead to other common problems, such as dishing and erosion, which are forms of local planarisation where certain areas of the wafer polish faster than others. The use of a number of smaller substrate tiles, with interconnecting bond wires has been found to be a more economic approach to achieving the desired surface uniformity, but in many cases, overall electrical performance is compromised.
Today, in the field of satellite communications, the design of satellite payloads is becoming ever more complex as the demand for increased functionality, provided by a single payload, is driven by the desire to minimise costs. All satellite payloads are, in principal, designed to be as small and with as low a mass as possible but with the continuing quest for increased functionality and minimum costs, there is a clear conflict of requirement. One way of resolving this situation is to design packaged electronic circuits with higher levels of integration so as to reduce the number of discrete packages needed for a payload with increased functionality. The introduction of HTCC and LTCC technologies has facilitated a certain degree of increased functional integration due to the multi-layer capability inherent in these techniques but, notwithstanding, the desire still exists to package larger ceramic substrates, as well as, utilising multiple circuit layers.
Increased functionality may be achieved, for example, by packaging a larger number of electrically independent RF signal channels within one multi-layer module. However, the independent nature of such signal channels, in close physical proximity, results in more demanding internal RF isolation requirements that must be provided for within the metal housing. This, in turn, means that the grounding of the substrate tracking to the internal walls of the housing must often be of better quality than has been previously been available for less complex packages.
The use of a conductive adhesive to fix the substrate to its housing as described above with reference to FIG. 1, is clearly only practical when surface of the ceramic substrate is uniform and parallel to the mating features of the metal housing to which it is to be fixed, in order to avoid cracking or stressing of the substrate, on fixing to the housing prior to the adhesive curing process. The risk associated with this problem is particularly high for ceramic substrates that are manufactured using HTCC and LTCC processes and which are capable of being arbitrarily large.
In summary, the existing assembly technique of using a conductive adhesive so as to fix a ceramic substrate into a machined, or otherwise manufactured, housing, suffers from relatively poor performance due to detrimental effects associated with non-uniformity of the surface of the ceramic substrates used. In particular, the isolation parameter, associated with the bonding conductivity, usually decreases as the physical size of the ceramic substrate increases.